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This is very interesting, but not what the Ironside TPU is doing. The blog post says that the TPU uses conventional HBM RAM.


There's been some talk/rumour of next-gen HBMs having some compute capability on the base die. But again, not what they're doing here, this is regular HBM3/HBM3e.

https://semiengineering.com/speeding-down-memory-lane-with-c...




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